[HTML][HTML] Baricitinib in patients admitted to hospital with COVID-19 (RECOVERY): a randomised, controlled, open-label, platform trial and updated meta-analysis

…, A Ahmed, A Ahmed, A Ahmed, BAR Ahmed, B Ahmed… - The Lancet, 2022 - thelancet.com
Background We aimed to evaluate the use of baricitinib, a Janus kinase (JAK) 1–2 inhibitor,
for the treatment of patients admitted to hospital with COVID-19. Methods This randomised, …

[HTML][HTML] Higher dose corticosteroids in patients admitted to hospital with COVID-19 who are hypoxic but not requiring ventilatory support (RECOVERY): a randomised …

…, A Ahmed, A Ahmed, A Ahmed, BAR Ahmed, B Ahmed… - The Lancet, 2023 - thelancet.com
Background Low-dose corticosteroids have been shown to reduce mortality for patients with
COVID-19 requiring oxygen or ventilatory support (non-invasive mechanical ventilation, …

[HTML][HTML] Molecular spectrum of KRAS, NRAS, BRAF, PIK3CA, TP53, and APC somatic gene mutations in Arab patients with colorectal cancer: determination of …

…, R Abdel-Wahab, AOS Abousamra… - Journal of …, 2016 - ncbi.nlm.nih.gov
Background The frequency rates of mutations such as KRAS, NRAS, BRAF, and PIK3CA in
colorectal cancer (CRC) differ among populations. The aim of this study was to assess …

Compiler-assisted data distribution for chip multiprocessors

Y Li, A Abousamra, R Melhem, AK Jones - Proceedings of the 19th …, 2010 - dl.acm.org
Data access latency, a limiting factor in the performance of chip multiprocessors, grows
significantly with the number of cores in non-uniform cache architectures with distributed cache …

Deja vu switching for multiplane nocs

AK Abousamra, RG Melhem… - 2012 IEEE/ACM Sixth …, 2012 - ieeexplore.ieee.org
In chip-multiprocessors (CMPs) the network-on-chip (NoC) carries cache coherence and
data messages. These messages may be classified into critical and non-critical messages. …

Proactive circuit allocation in multiplane NoCs

A Abousamra, AK Jones, R Melhem - Proceedings of the 50th Annual …, 2013 - dl.acm.org
This work explores a method for efficient pre-allocation of circuits in network-on-chip (NoC)
to reduce communication latency and improve performance. Circuit pre-allocation eliminates …

Codesign of NoC and cache organization for reducing access latency in chip multiprocessors

A Abousamra, AK Jones… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Reducing data access latency is vital to achieving performance improvements in computing.
For chip multiprocessors (CMPs), data access latency depends on the organization of the …

Theoretical analysis and evaluation of NoCs with weighted round-robin arbitration

…, R Ayoub, M Kishinevsky, A Abousamra… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
Fast and accurate performance analysis techniques are essential in early design space
exploration and pre-silicon evaluations, including software eco-system development. In particular…

GPU performance estimation using software rasterization and machine learning

K O'neal, P Brisk, A Abousamra, Z Waters… - ACM Transactions on …, 2017 - dl.acm.org
This paper introduces a predictive modeling framework to estimate the performance of GPUs
during pre-silicon design. Early-stage performance prediction is useful when simulation …

Winning with pinning in NoC

A Abousamra, R Melhem… - 2009 17th IEEE …, 2009 - ieeexplore.ieee.org
In chip multiprocessors (CMPs), on-chip interconnect carries data and coherence traffic
exchanged between on chip cache banks. Reducing communication latency is critical for …